May be filled
Mixed Signal IC Layout Design Engineer
North America
2026-04-14
Est. MXN 20k–40k
Estimated salary range
80% confidenceSource: Employer provided
20,000
MXN
40,000
Estimate based on location data. Verify with employer.
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AI Summary
Powered by ClaudeTenstorrent is looking for a Mixed-Signal IC Layout Design Engineer to own a fullâcustom layout for highâperformance analog and mixedâsignal IP in advanced FinFET nodes. Deep proficiency in Cadence Virtuoso (XL/GXL) or equivalent custom layout environments, including constraintâdriven layout and PCells.
Job description
Tenstorrent is looking for a Mixed-Signal IC Layout Design Engineer to own a fullâcustom layout for highâperformance analog and mixedâsignal IP in advanced FinFET nodes. Deep proficiency in Cadence Virtuoso (XL/GXL) or equivalent custom layout environments, including constraintâdriven layout and PCells.
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